1. Field of the Invention
The present invention relates to a via-structure of a multilayer interconnection ceramic substrate and, more particularly, to an enforced via-structure of a low cost ceramic substrate for mounting LSI chips and packagings.
2. Description of Prior Art
Multilayer interconnection ceramic substrates including, for examples, an insulating substrate, multilayer printed circuit board and ceramic packages for mounting LSIs are greatly used in the semiconductor industry.
FIGS. 1 and 2 are partial cross-sectional views each for showing a problem in a conventional multilayer interconnection ceramic substrate having a via-conductor formed in the vicinity of the substrate surface. In general, a via-conductor of a multilayer interconnection ceramic substrate, which interconnects terminals or bonding posts for inner leads, outer leads, semiconductor chips and packagings, is composed of a metal or an alloy such as W, Mo, Au, Ag, Cu or Ag-Pd. Since a metal has a thermal expansion coefficient higher than that of ceramic, cracks 4 shown in FIG. 1 frequently appear during steps for sintering and for post-treatment. Although an adhesive force of the ceramics to the via-conductor may be reduced in order to eliminate the cracks 4 in FIG. 1 by controlling a composition in a paste or an atmosphere for sintering, a peeling-off shown in FIG. 2 arises instead due to the low adhesive force. Hence, conventional multilayer interconnection ceramic substrates suffer problems of low mechanical strength and low reliability in electric performance.
Recently, a multilayer interconnection substrate composed of a ceramic substrate has been reported, which has a polyimide layer for interconnection layers and is formed on the ceramic substrate. The ceramic substrate, however, will have cracks in the vicinity of the substrate surface as shown in FIG. 3. In view of the problem of the cracks, another ceramic substrate is proposed, which has thereon a photo-sensitive resin film for covering cracks and having holes only for through-holes, by Patent Publication No. JP-A-90-234456. However, a photo-sensitive resin film has a problem that a manufacturing cost for a semiconductor devices increases and an additional problem that cracks and peelings-off formed in the ceramic substrate involve failures such as swelling of the resin.
Meanwhile, it is proposed by Patent Publication No. JP-A-91-145796 that, in a printed circuit board having a through-hole filled with a conductive paste, treatment of a sidewall surface of the through-hole with a silane coupling agent strengthens an affinity between a conductive paste and an insulator layer formed by impregnating a resin into a base material having a sheet form. However, such a treatment cannot eliminate any cracks when it is applied to a sintered metallic conductor and a ceramic insulator.
As a countermeasure to a metallic ion migration, a method for manufacturing a printed circuit board is proposed by Patent Publication No. JP-A-91-91992, wherein a through-hole is filled with an insulating resin and a conductive paste. This technology, however, cannot be applied if the substrate is of ceramics or if the conductor is of a sintered metal.
As described above, it is difficult to obtain a structure having a high strength and a high electric reliability at a low cost in a multilayer interconnection ceramic substrate having a via-hole.